x86/nospec: Fix i386 RSB stuffing
authorPeter Zijlstra <peterz@infradead.org>
Fri, 19 Aug 2022 11:01:35 +0000 (13:01 +0200)
committerSalvatore Bonaccorso <carnil@debian.org>
Fri, 2 Sep 2022 13:54:53 +0000 (14:54 +0100)
Origin: https://git.kernel.org/linus/332924973725e8cdcc783c175f68cf7e162cb9e5
Bug-Debian: https://bugs.debian.org/1017425

Turns out that i386 doesn't unconditionally have LFENCE, as such the
loop in __FILL_RETURN_BUFFER isn't actually speculation safe on such
chips.

Fixes: ba6e31af2be9 ("x86/speculation: Add LFENCE to RSB fill sequence")
Reported-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/Yv9tj9vbQ9nNlXoY@worktop.programming.kicks-ass.net
Gbp-Pq: Topic bugfix/x86
Gbp-Pq: Name x86-nospec-Fix-i386-RSB-stuffing.patch

arch/x86/include/asm/nospec-branch.h

index 10b96942c4439a022a256860900ff2ccb2763daf..07f5030073bbc8d538e995aecceeec6f9817fc71 100644 (file)
@@ -50,6 +50,7 @@
  * the optimal version — two calls, each with their own speculation
  * trap should their return address end up getting used, in a loop.
  */
+#ifdef CONFIG_X86_64
 #define __FILL_RETURN_BUFFER(reg, nr)                  \
        mov     $(nr/2), reg;                           \
 771:                                                   \
        jnz     771b;                                   \
        /* barrier for jnz misprediction */             \
        lfence;
+#else
+/*
+ * i386 doesn't unconditionally have LFENCE, as such it can't
+ * do a loop.
+ */
+#define __FILL_RETURN_BUFFER(reg, nr)                  \
+       .rept nr;                                       \
+       __FILL_RETURN_SLOT;                             \
+       .endr;                                          \
+       add     $(BITS_PER_LONG/8) * nr, %_ASM_SP;
+#endif
 
 /*
  * Stuff a single RSB slot.